Technique for interconnecting multilayer circuit boards

Details Technique for interconnecting multilayer circuit boards Technique for interconnecting multilayer circuit boards

H - Electricity

05

K

H05K 1/14 (2006.01) H05K 3/36 (2006.01) H05K 3/46 (2006.01) H01R 13/642 (2006.01) H01R 13/66 (2006.01) H05K 3/34 (2006.01) H05K 3/42 (2006.01)

Patent

CA 2470790

A circuit device for interconnecting first and second multilayer circuit boards is described herein. The first multilayer circuit board may include a first plurality of electrically conductive vias of varying depths and the second multilayer circuit board may include a second plurality of electrically conductive vias. The circuit device comprises a first plurality of pins located on a first side of the circuit device corresponding to the first plurality of electrically conductive vias of the first multilayer circuit board, each pin having a length compatible with a depth of a respective one of the first plurality of electrically conductive vias of the first multilayer circuit board. The circuit device further comprises a second plurality of pins located on a second side of the circuit device corresponding to the second plurality of electrically conductive vias of the second multilayer circuit board.

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