Technique for preventing forward biased epi-isolation...

H - Electricity – 01 – L

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H01L 21/265 (2006.01) H01L 21/761 (2006.01) H01L 29/06 (2006.01)

Patent

CA 1057419

TECHNIQUE FOR PREVENTING FORWARD BIASED EPI-ISOLATION DEGRADATION ABSTRACT: Certain types of silicon integrated circuits are embodied as having diffused isolation regions surrounding epitaxial regions. Although normally operated in a reverse bias mode, such regions may become forward biased when sourcing current for certain circuit applications. Certain types of ionized impurities lodged in the isolation region can then migrate into the depletion region and the epitaxial region of the device during a forward bias condition. Such contaminants can be expected to produce generation-recombination centers in the depletion layer of the device which, when the isolation region is then reverse biased, will produce significant increases in junction leakage current. The magnitude of this reverse bias leakage current will depend upon both the contaminant concentration and the width of the depletion region. The leakage problem is prevented by adding the guard ring to the isolation region of the same conductivity type as the isolation region. The guard ring can be added at the time of the base diffusion in bipolar technology. The guard ring prevents an ohmic electric field from extending into the original isolation region where the ionic impurities are concentrated, preventing diffusion of the impurities into the epitaxial region. -1-

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