Temperature compensation cmos to ecl translator

Details Temperature compensation cmos to ecl translator Temperature compensation cmos to ecl translator

H - Electricity

03

K

328/199

H03K 19/00 (2006.01) H03K 19/003 (2006.01) H03K 19/0185 (2006.01) H03K 19/094 (2006.01) H01L 27/02 (2006.01)

Patent

CA 1238374

TEMPERATURE COMPENSATED CMOS TO ECL TRANSLATOR Abstract of the Disclosure The present invention is a temperature compensating circuit adapted for use with a CMOS to ECL interfacing circuit which uses one normally unused ECL logic gate, formed on a chip of many ECL logic gates for generating the supply voltages for the level interfacing circuit such that the output voltage levels from the interfacing circuit will automatically track with the temperature experienced by the chips ECL logic gates.

522663

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