Test vector indexing method and apparatus

G - Physics – 01 – R

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G01R 31/28 (2006.01) G01R 31/3183 (2006.01) G01R 31/319 (2006.01)

Patent

CA 1198827

- 15 - ABSTRACT OF THE DISCLOSURE A data channel for a digital tester includes random access local memory containing a main vector sequence, a subroutine vector sequence, and a test vec- tor list. An index register is loaded with the address of the first vector in the list of vectors that is to be inserted as a variable into a vector stream. A sequence instruction selects the index register as the source of a test vector address when a variable vector is to be inserted into the vector stream at a point in a subroutine. The sequence instruction also resets the index register to a state which determines the address of the next variable to be inserted into the test vector pattern.

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