Testing of memory content

G - Physics – 11 – C

Patent

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Details

G11C 29/00 (2006.01) G11C 29/52 (2006.01)

Patent

CA 2194289

A method of testing a memory associated with a microprocessor, particularly for use in smart cards. The method involves comparing the output from the memory (2) passed along a read path (10) with predetermined data signals generated externally and passed via a port (7) along a read path (9). Comparison is carried out in a comparison device (3) which may, for example, be the microprocessor, suitably programmed. The output from the comparison device (3) is a simple pass/fail verification signal applied to a port (5). The stored data held in memory (2) may be permanently held data such as in a ROM, or (where the memory is alterable) may be specially written to the memory for the purpose of the test.

Procédé permettant de tester une mémoire associée à un microprocesseur, utile notamment pour des cartes à mémoire, et consistant à comparer le signal de sortie de la mémoire (2) acheminé le long d'un chemin de lecture (10) avec des signaux de données prédéterminés produits de façon externe et acheminés via un port d'accès (7) le long d'un chemin de lecture (9). Cette comparaison s'effectue dans un dispositif (3) de comparaison qui peut être, par exemple, le microprocesseur programmé de façon appropriée. Le signal de sortie du dispositif de comparaison (3) est un simple signal de vérification accord/refus appliqué à un port d'accès (5). Les données mémorisées maintenues dans la mémoire (2) peuvent être des données maintenues de façon permanente comme dans une mémoire morte (ROM) ou (si la mémoire est altérable) écrites spécialement dans la mémoire aux fins de l'essai.

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