Time-division multiplex communication system

H - Electricity – 04 – J

Patent

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Details

H04J 3/06 (2006.01) H04B 7/24 (2006.01)

Patent

CA 2066281

Each of the repeater stations comprises a frame synchronization circuit, a loop-back circuit and a repeater number calculating circuit. The repeater number calculating circuit calculates the second repeater number thereof depending on the number of layers from the master station based on the first repeater number when the repeater station is in frame synchronization as determined by the frame synchronization circuit. The repeater number calculating circuit equalizes the second repeater number thereof to the first repeater number irrespective of the number of layers from the master station when the repeater station is in frame asynchronization as determined by the frame synchronization circuit.

Chaque station de répéteurs est dotée d'un circuit de synchronisation de trame, d'un circuit de bouclage et d'un circuit de calcul de numéro de répéteur. Ce dernier circuit calcule le second numéro de répéteur à partir du nombre de couches provenant de la station maîtresse et du premier numéro de répéteur, lorsque la station de répéteurs est en mode de synchronisation de trame tel que déterminé par le circuit de synchronisation de trame. Le circuit de calcul du numéro de répéteur fait correspondre le deuxième numéro de répéteur au premier, quel que soit le nombre de couches provenant de la station maîtresse lorsque la station de répéteurs est en mode de non synchronisation de trame tel que déterminé par le circuit de synchronisation de trame.

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