Time division multiplexing ram

G - Physics – 11 – C

Patent

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344/25, 352/82

G11C 11/24 (2006.01) G11C 7/10 (2006.01) G11C 8/12 (2006.01) G11C 19/38 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 1247739

TIME DIVISION MULTIPLEXING RAM Abstract A time division multiplexing RAM is described and entitled an orthogonal RAM. This device performs the three functions required for reception of a time division multiplexed digital bit stream, namely storage serial-to-parallel conversion and multiplexing in a memory structure which writes information in one direction, for example in the X direction, and reads out information in a directional orthogonal thereto, i.e, the Y direction. The device comprises an array of storage elements having N columns and M rows of storage. M input conductors are provided for conducting the digital bits of information along with M rows of write conductors for providing an enabling signal to M rows of write means which write in the digital bits of information on the input conductors into the storage elements. N columns of read conductors provide an enabling signal to N columns of read means which are coupled to each storage element for reading out the digital bits of information from said storage elements onto readout conductors. In a preferred embodiment, the storage elements comprise capacitors and the write means and the read means comprise MOS transistor switches.

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