Time shared programmable logic array

Details Time shared programmable logic array Time shared programmable logic array

G - Physics

11

C

328/128

G11C 11/40 (2006.01) H01L 27/112 (2006.01) H03K 19/08 (2006.01) H03K 19/177 (2006.01)

Patent

CA 1092664

TIME SHARED PROGRAMMABLE LOGIC ARRAY ABSTRACT This specification describes arrays for performing logic functions. In these arrays input variables are placed on a series of parallel input lines that intersect a number of parallel output lines in a grid of intersections, Field effect devices at these intersections have their gate terminals connected to one of the input lines and their source terminal connected to one of the output lines and through a load device to a source of potential. The drain terminals of these devices are either unconnected, connected directly to ground or connected to ground through one of two switching devices. The devices with unconnected drains are inoperative. The devices with their drains connected directly to ground are operative at all times. While the devices connected to ground through one of the switches are operative only when the switch is closed. The array can be time shared by two different logic functions by having one or the other of the switches off at any given time.

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