Time slot interchanger and digital communications terminal...

H - Electricity – 04 – L

Patent

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Details

H04L 12/52 (2006.01) H04Q 11/04 (2006.01) H04Q 11/08 (2006.01)

Patent

CA 2223319

The invention comprises a time slot interchanger and method for multiplexing ISDN D-channel signals into multiplexed signals in a digital communications terminal. The method comprises receiving a frame of communication signals wherein some of the communication signals represent ISDN D-channel signals. The frame of communication signals is stored in memory during a first frame period. During a second frame period, at least some of the stored communication signals are retrieved from memory. Multiplexed signals are assembled wherein each multiplexed signal comprises a multiplexed combination of the data bits of ISDN D-channel signals retrieved from memory. The multiplexed signals are then output during a second frame period.

La présente invention porte sur un échangeur de créneaux temporels et sur une méthode de multiplexage de signaux de canal D de RNIS dans un terminal de communication numérique. La méthode de l'invention consiste à recevoir une trame de signaux de communication dont certains sont des signaux de canal D de RNIS. Cette trame est mise en mémoire durant une première période de trame. Durant une seconde période de trame, au moins une partie des signaux de communication en mémoire est extraite de celle-ci. Les signaux multiplexés constitués d'une combinaison multiplexée des bits de données des signaux de canal D de RNIS extraits de la mémoire sont regroupés. Ces signaux sont ensuite transmis durant une seconde période de trame.

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