Time slot multiple circuit for the selective establishment...

H - Electricity – 04 – J

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363/23

H04J 3/02 (2006.01) H04L 12/52 (2006.01) H04Q 11/08 (2006.01)

Patent

CA 1167575

ABSTRACT OF THE INVENTION "A TIME SLOT MULTIPLE CIRCUIT FOR THE SELECTIVE ESTABLISHMENT OF CONNECTIONS IN A T.D.M. DIGITAL TELECOMMUNICATIONS SYSTEM" Summary Incoming channel signals, which may occupy more than one time slot per t.d.m. frame, are t.d.m. multiplexed (MUX) and stored cyclically in a signal store (SPS). Connections are established between incoming and outgoing channels by means of associations between signal store addresses and outgoing channel time slots on a t.d.m. trunk line (AML). These associations are stored in a control store (STS) which is addressed cyclically by means of a counter (ZLZ). To write the associations into the control store an address register produces the associated addresses on instructions from a superordinate device. To minimise the operating time of the superordinate device when a connection involves more than one time slot per t.d.m. frame, one pair of associated addresses is arranged to produce automatically all the associated addresses required to switch signals from an incoming channel time slot to the associated outgoing channel time slot. Since the channel time slots are equi-spaced, a signal indicative of the number of transmission rate (number of time slots per frame) can be used to cause a comparator for triggering write-in into the control store to simulate more than one address per frame by disregarding one or more highest significant digits in the comparison. Alternatively the transmission rate indication may be used to substitute one or more highest significant digits or the count of a counter (ZLZ) for the corresponding digits of addresses received from the address register. (Fig. 2)

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