Timeslot interchange network

H - Electricity – 04 – J

Patent

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Details

H04J 3/16 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2256097

A time slot interchange having a data channel memory, a channel circuit, having a write address output, the write address output connected to the data channel memory, a signal processing circuit, having a channel input coupled to the data channel memory, a gain input, and an output coupled to the time division multiplexed signal output port, and a connection memory, including a unique read channel field comprising a read address portion and a gain value portion for each data channel to be output by the time slot interchange network. The connection memory has an input connected to the write address output of the channel circuit, a read address output connected to the data channel memory, and a gain value output connected to the gain input of the signal processing circuit.

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