Timing synchronizing circuit for demodulators

Details Timing synchronizing circuit for demodulators Timing synchronizing circuit for demodulators

H - Electricity

03

D

329/3

H03D 3/18 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1208311

Abstract of the Disclosure In a timing synchronizing circuit wherein a timing signal is regenerated from a baseband signal subjected to a bandwidth limitation, there are provided a voltage controlled oscillator whose oscillation frequency varies in accordance with a control signal,an A/D converter which samples and shapes the baseband signal by utilizing the output of the voltage controlled oscillator, a decision circuit for deciding the polarity of a differential coefficient of the baseband signal at an optimum sampling point on the basis of an output of the A/D converter, and a logic circuit responsive to the output of the decision circuit to apply a logical operation to a decision signal derived from the A/D converter and which decides whether or not the baseband signal shifts from a level corresponding to the optimum sampling point, thereby producing the control signal for the voltage controlled oscillator. According to this circuit the regenerated timing signal contains only a negligible amount of jitter components and always maintains an optimum timing without using any phase adjustment.

448593

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