Transversal equalisers

H - Electricity – 03 – H

Patent

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H03H 11/04 (2006.01) H03H 7/01 (2006.01) H04L 25/06 (2006.01)

Patent

CA 1148224

A B S T R A C T IMPROVEMENTS IN OR RELATING TO TRANSVERSAL EQUALISERS The presence of a d.c. offset in the input signal to an adaptive equaliser for a high speed modem must be removed before a valid signal enters the equaliser if the "coefficient up-date" algorithm for the equaliser is not to be confused. Normally the d.c. compensation is achieved using adjust-on- test resistors or potentiometers which provide for in life adjustments to compensate for ageing drift. The submission envisages the use of an additional adaptive equaliser tap- stage connected to a fixed voltage source. his voltage is multiplied by the additional tap stage multiplier and summed with the outputs of the other tap-stages in the equalisers accumulator. The error produced from the equaliser decision circuit is correlated with the fixed voltage in the additional tap-stage correlator the output of which controls the gain of the additional tap-stage multiplier thereby compensating for the original d.c. offset of the output of the equaliser accumulator.

360192

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