Tri-level input buffer

Details Tri-level input buffer Tri-level input buffer

H - Electricity

03

K

328/84

H03K 19/094 (2006.01) H03M 5/16 (2006.01)

Patent

CA 1196393

ABSTRACT OF THE DISCLOSURE A simple six-transistor input buffer for generating and applying binary function test signals to associated circuitry in an integrated circuit package. The buffer recognizes three different voltage levels of an input signal that is applied to a single input test pin and gener- ates three corresponding binary output signals that may be used for testing various functions of the associated circuitry.

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