Triple diffused short channel device structure

H - Electricity – 01 – L

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H01L 29/78 (2006.01) H01L 21/266 (2006.01) H01L 21/336 (2006.01) H01L 29/10 (2006.01)

Patent

CA 1193758

TRIPLE DIFFUSED SHORT CHANNEL DEVICE STRUCTURE ABSTRACT A short channel metal oxide semiconductor transistor device is processed without undesirable short channel effects, such as VT falloff and with a reasonable source-drain operating voltage support. In a substrate lightly doped with a P-type conductivity material and source and drain region heavily doped with an N-type conductivity material, two lightly doped N- regions are disposed between the edge of the gate and the source and drain regions. A channel region is more heavily doped with P-type material than the substrate. Two regions extend from opposite sides of the channel region to an area generally below the two N- regions and above the substrate, which regions are more heavily doped than the channel regions.

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