Triple orthogonally interleaved error correction system

Details Triple orthogonally interleaved error correction system Triple orthogonally interleaved error correction system

H - Electricity

03

M

H03M 13/27 (2006.01) G11B 20/18 (2006.01) H03M 13/29 (2006.01) H03M 13/31 (2006.01) H03M 13/22 (1990.01)

Patent

CA 2087197

The detection and correction of errors in digital data transmitted by or stored in a media channel is provided by processing the data through a triple orthogonally interleaved error correction system. On the transmit/store side of the system, the data is encoded three times prior to placement in the media channel with two different interleaving steps performed between the encoding steps. The first interleave is an orthogonal row shuffling interleave that provides enhanced protection against burst errors. On the receive/play back side, the data is decoded and deinterleaved, with included errors detected and corrected to enable recovery of the original data. To enhance the error correction, a circuit is used for generating a symbol accurate error flag identifying symbols containing errors thereby allowing the error correcting decoders to focus on and correct the data.

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