Tristate phase-lock loop prevents false lock

Details Tristate phase-lock loop prevents false lock Tristate phase-lock loop prevents false lock

H - Electricity

03

L

328/87

H03L 7/10 (2006.01) H03L 7/089 (2006.01) H04L 7/027 (2006.01)

Patent

CA 1270535

Abstract: A phase-lock loop includes a tristate phase detector, a filter and a voltage-controlled oscillator connected in a loop for regenerating clock signals in response to a sequence of data signals applied to the input terminal of the tristate phase detector and the loop. The tristate phase detector opens its output lead whenever a zero is applied to the input terminal of the loop. A resistor is interposed between the tristate phase detector and the loop filter to clamp excursions of a control signal, causing the filter to produce a consistent tuning control signal and forcing the voltage- controlled oscillator to oscillate at a frequency within a preselected frequency range independent of the ones density in the digital sequence applied to the input terminal of the loop.

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