Ttl totem pole anti-simultaneous conduction circuit

H - Electricity – 03 – K

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328/158

H03K 19/088 (2006.01) H03K 17/16 (2006.01) H03K 17/66 (2006.01) H03K 19/00 (2006.01)

Patent

CA 1315361

Attorney Docket No.: 53.1138 TTL TOTEM POLE ANTI-SIMULTANEOUS CONDUCTION CIRCUIT Abstract An anti-simultaneous conduction transistor is incorporated into the standard TTL circuit totem pole to reduce simultaneous conduction of the pullup and pulldown transistor elements of the totem pole. The collector of the active discharge anti-simultaneous conduction transistor element (Q5) is operatively coupled to a base of the pullup transistor element (Q2,Q3) through a diode (D5), the emitter is coupled to low potential, and the base is coupled to the base of the pulldown transistor element (Q4) through ballast resistance (R6,R7). The anti-simultaneous conduction transistor element (Q5) mirrors the conducting state of the pulldown transistor element (Q4) without current hogging substantially diverting or discharging base current from the base of the pullup transistor element (Q2,Q3) whenever the pulldown transistor element (Q4) is conducting. Undesirable current spikes in the sourcing current are avoided by preventing simultaneous conduction in the totem pole.

601618

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