Two-device memory cell

Details Two-device memory cell Two-device memory cell

G - Physics

11

C

352/82.3

G11C 11/40 (2006.01) G11C 11/404 (2006.01) G11C 11/4091 (2006.01) G11C 11/4097 (2006.01)

Patent

CA 1095620

TWO-DEVICE MEMORY CELL Abstract A two-device memory cell for a memory array comprising a single storage capacitor having its terminals respectively coupled to one end of the respective source-drain paths of a pair of field-effect transistors so as to be in series therewith and float between a pair of bit/sense lines of the memory array respectively coupled to the other end of said paths and thereby provide a differential sense signal. Each of the gate electrodes of said pair of field effect transistors is coupled to the word line of said memory array. The differential sense signal obtained from such an arrangement obviates the need for a dummy cell to provide a reference level for detecting the state of the cell.

278853

Affiliated with

Also associated with

Rating

Two-device memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Two-device memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Two-device memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-461551