Two-level ecl multiplexer without emitter dotting

Details Two-level ecl multiplexer without emitter dotting Two-level ecl multiplexer without emitter dotting

H - Electricity

03

K

328/127

H03K 17/62 (2006.01) H03K 19/086 (2006.01) H04J 3/04 (2006.01)

Patent

CA 1304791

TWO-LEVEL ECL MULTIPLEXER WITHOUT EMITTER DOTTING ABSTRACT OF THE DISCLOSURE A two-level 4:1 ECL multiplexer circuit com- prising two 2:1 multiplexer circuits "OR'd" together prior to a shared output stage. A differential Select line, operable at the same voltage level as the input data lines to the 2:1 multiplexer circuits selects one of the input lines to each 2:1 multiplexer circuit. A second Select line, operable at a different voltage level, selects one or the other of the 2:1 multiplexer circuits. This arrangement functions to eliminate an undesirable glitch observed when selecting data inputs in known two-level, 4:1 multiplexers which use emitter dotting.

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