Two terminal active arc suppressor

H - Electricity – 01 – H

Patent

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Details

H01H 33/04 (2006.01) H01H 9/54 (2006.01)

Patent

CA 2203947

The arc suppression circuit includes an insulated gate bipolar junction transistor (IGBT) connected across the electrical switch contacts to be protected. When the contacts open, the combination of added Miller capacitance and the gate-to-emitter capacitance of the IGBT results in the IGBT turning on. The IGBT is quickly turned off thereafter by a second transistor, which turns on as the voltage across the suppression circuit rises following turn-on of the IGBT. The turning on of the second transistor results in the first power transistor quickly and abruptly turning off so that relatively little of the load energy is dissipated in the power transistor.

Circuit d'élimination d'arc comprenant un transistor bipolaire à jonctions à grille isolée (IGBT) monté en parallèle avec les contacts d'interrupteur à protéger. Lorsque les contacts s'ouvrent, la combinaison de l'effet Miller et de la capacité grille-émetteur de l'IGBT débloque ce dernier. Ensuite, l'IGBT est bloqué rapidement par un deuxième transistor, qui se débloque à mesure que la tension aux bornes du circuit d'élimination d'arc augmente à la suite du déblocage de l'IGBT. Le déblocage du deuxième transistor provoque le blocage subit du premier transistor de puissance, de sorte que relativement peu de l'énergie de la charge est dissipée dans le transistor de puissance.

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