H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/148, 356/151
H01L 21/461 (2006.01) H01L 21/02 (2006.01) H01L 21/306 (2006.01) H01L 21/3213 (2006.01) H01L 21/334 (2006.01) H01L 21/8242 (2006.01) H01L 27/06 (2006.01) H01L 27/108 (2006.01) H01L 29/06 (2006.01)
Patent
CA 2024639
ABSTRACT OF THE DISCLOSURE ULTRA HIGH DENSITY THREE-DIMENSIONAL SEMICONDUCTOR STRUCTURES Three-dimensional semiconductor structures are taught in which various device types are formed from a plurality of planar layers on a substrate. The major process steps include the formation of a plurality of alternating layers of material, including semiconductor and dielectric materials, forming a vertical access hole in the layers, processing the layers selectively to form active or passive semiconductor devices, and filling the access hole with a conductor. The ultimate structure includes a three-dimensional memory array in which entire dynamic memory cells are fabricated in a stacked vertical orientation above support circuitry formed on a planar surface.
Faure Thomas B.
Meyerson Bernard S.
Nestork William J.
Pricer Wilbur D.
Turnbull John R. Jr.
International Business Machines Corporation
Saunders Raymond H.
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