Unused address bit based wait state selection circuit

Details Unused address bit based wait state selection circuit Unused address bit based wait state selection circuit

G - Physics

06

F

G06F 9/30 (2006.01) G06F 13/42 (2006.01)

Patent

CA 2054009

ABSTRACT UNUSED ADDRESS BIT BASED WAIT STATE SELECTION CIRCUIT A circuit for providing wait states using address bits not used in the device address decode. The various addresses memory and peripheral devices do not utilize the enter address space and so address bits are not utilized. A number of the unused bits are decoded to determine the number of wait states to be developed in the operation. The address decode based wait state determination is overridden for RAM operations, but followed for ROM and peripheral operations.

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