H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 21/64 (2006.01) G01P 15/125 (2006.01) G02B 26/08 (2006.01) H01L 21/302 (2006.01) H01L 21/70 (2006.01) H01L 21/78 (2006.01)
Patent
CA 2129212
ABSTRACT A method for processing a wafer containing microelectronic mechanical devices that allows all fabrication and test steps to be performed in wafer form instead of device form. The wafer 20 is mounted in a saw frame 24 on dicing tape 22 and the individual devices 27 separated, typically by sawing, prior to completing device fabrication. The devices are left on the dicing tape during the remaining fabrication steps. Some fabrication steps may require covering the adhesive of the dicing tape with a protective cover 44. After all fabrication steps including the application of a protective overcoat and functional testing are completed, the devices are removed from the dicing tape and packaged. TI-17568 Page 14
Kirby Eades Gale Baker
Texas Instruments Incorporated
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