H - Electricity – 03 – H
Patent
H - Electricity
03
H
354/147
H03H 17/00 (2006.01) G06F 7/50 (2006.01) G06F 7/544 (2006.01) G06F 7/57 (2006.01) G06F 17/15 (2006.01) H03H 17/06 (2006.01)
Patent
CA 1196105
DIGITAL SIGNAL PROCESSING CIRCUIT ABSTRACT OF THE DISCLOSURE A digital signal processing circuit formed on a single integrated chip includes a multiplier for multiplying a multiplicand and multiplier signal to produce a multiple bit product signal having higher order bits delayed more than lower order bits; a first delay circuit for concatenating and delaying the multiplier and multiplicand signals to produce a delayed concatenated signal having higher order bits delayed more than lower order bits; a first selector for selectively supplying either the product signal, the delayed concatenated signal, or a concatenated signal formed from the multiplier and multiplicand signals, as a first selected signal; an adder for adding an input signal to the first selected signal to produce a summed signal; a second delay circuit for delaying a summand signal by a predetermined amount to produce a first delayed summand signal; a third delay circuit for delaying the summand signal to produce a second delayed summand signal having higher order bits delayed more than lower order bits; a second selector for selectively supplying either the first or second delayed summand signal to the adder as the input signal; a fourth delay circuit for delaying the the summand signal by a predetermined amount to produce a first delayed summed signal; a fifth delay circuit for delaying the summed signal to produce a second delayed summed signal having lower order bits delayed more than higher order bits; and a third selector for selectively supplying either the first or second delayed summed signal as an output of the processing circuit.
434737
Gowling Lafleur Henderson Llp
Sony Corporation
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