G - Physics – 06 – M
Patent
G - Physics
06
M
354/97
G06M 3/00 (2006.01) G05B 7/02 (2006.01) G05B 15/02 (2006.01)
Patent
CA 1066808
APPLICATION OF FRANK J. PRZYBYLSKI VARIABLE SPEED ANALOG SIGNAL INCREMENTATION CIRCUIT ABSTRACT Variable incrementation of an analog output signal is achieved by using a variable frequency clock generator for providing input signals to be counted by a presettable counter. The counter is preset by a digital word from a control processor which may include a digital computer. An output signal from the counter is applied to a digital-to-analog converter to produce a process control analog signal. The output signal of the variable frequency clock generator is obtained by a sequential selection of a plurality of differing fixed frequency signals from a frequency divider arranged to generate a plurality of lower frequency signals from a fixed frequency clock signal source. A second counter is driven by an output of the frequency divider to further subdivide the clock source signal. The stored count state of the second counter is decoded and the resulting sequential signals are applied to respective gates in combination with corresponding ones of the plurality of fixed frequency signals generated by the frequency divider. The counting operation by the second counter is thus, effective to sequentially apply the differing frequency signals from the frequency divider through the gates to the presettable counter to increment the stored digital word at the respective frequency of the gated frequency signal.
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