Variable speed analog signal incrementation circuit

G - Physics – 06 – M

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354/97

G06M 3/00 (2006.01) G05B 11/10 (2006.01) G05B 15/00 (2006.01)

Patent

CA 1066807

APPLICATION OF FRANCIS J. BECK VARIABLE SPEED ANALOG SIGNAL INCREMENTATION CIRCUIT ABSTRACT Variable incrementation of an analog output signal is achieved by using a variable frequency clock generator for providing input signals to be counted by a presettable counter. The counter is preset by a digital word from a digital controller which may include a digital computer. An output signal from the counter is applied to a digital-to-analog converter to produce a process control analog signal. An output signal of the variable frequency clock generator is obtained by a sequential selection of a plurality of differing frequency signals from a frequency divider having a second counter arranged to generate a plurality of lower frequency signals from a fixed frequency clock signals source. The lower frequency signals of the divider are decoded and the resulting sequential signals are applied to respective gates. The counting operation by the second counter is, thus, effective to sequentially apply the differing frequency signals representing different counts of the counter through the gates to the presettable counter to increment the stored digital word at the respective frequency of the gated frequency signal.

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