Vddq integrated circuit testing system and method

Details Vddq integrated circuit testing system and method Vddq integrated circuit testing system and method

G - Physics

01

R

G01R 31/00 (2006.01) G01R 31/30 (2006.01)

Patent

CA 2407766

A method and system for Vddq Integrated (IC) testing are described herein. The method includes the positioning of a resistive element between a voltage source and the power supply terminal of the IC under test and the approximation of the voltage value at the power supply terminal when the IC is generally at steady state. Depending on the approximated voltage value, the IC may be determined faulty or not.

Procédé et système de test de circuit intégré (IC) Vddq. Ledit procédé comporte la mise en place d'un élément résistif entre une source de tension et la borne d'alimentation de puissance du circuit intégré testé, et l'approximation de la valeur de tension au niveau de la borne d'alimentation de puissance lorsque le circuit intégré est généralement à un régime établi. En fonction de la valeur de tension lissée, le circuit intégré peut être déterminé comme étant défectueux ou non.

Affiliated with

Also associated with

Rating

Vddq integrated circuit testing system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Vddq integrated circuit testing system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vddq integrated circuit testing system and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1433578