Vdt stress mitigating device and method, vdt stress risk...

G - Physics – 06 – F

Patent

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G06F 3/14 (2006.01) G09G 5/24 (2006.01) G09G 5/42 (2006.01) H04N 5/44 (2006.01)

Patent

CA 2326712

The aim of the present invention is to provide a VDT stress mitigating device and method capable of mitigating VDT stress caused by a regular spatial pattern and VDT stress caused by flicker generated by an interlaced format, a VDT stress risk quantifying device and method, and a recording medium. An A/D conversion section 10 imports interlaced format video signals P1 from an external image signal output device and converts them in field units by A/D conversion into image data D1. A filter section 20, while not distinguishing between the first field and the second field, and while maintaining the temporal order of these fields, performs a temporal filtering process on the image data of each field. A D/A conversion section 30 converts the image data D2 that has undergone the temporal filtering process by the filter section 20 into image signals P2 based on an interlaced format by D/A conversion. The image signals P2 are then sequentially outputs according to the temporal order of the fields.

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