G - Physics – 06 – F
Patent
G - Physics
06
F
354/166, 354/234
G06F 15/80 (2006.01)
Patent
CA 2002104
A vector processing apparatus for carrying out vector data processing including fetching vector data from a main storage, carrying out vector calculations, and storing vector data in the main storage, concurrently in a plurality of vector processing units. Each of the vector processing units carries out vector data processing for a portion of elements among all elements of vector data, where all elements are ordered, and the vector data processing is carried out in the order of the elements. Each of the vector processing units contains: an address generator and a priority controller. The address generator in each vector processing unit concurrently generates addresses for accesses to the main storage for elements which are concurrently requested by the above plurality of vector processing units. The priority controller determines one or more accesses as allowable, among the accesses which are concurrently requested by the plurality of vector processing units, based on the addresses concurrently generated in the address generator, and the above order of the elements, and then outputs one or more signals for the accesses which are requested by its own vector processing unit, and are determined as allowable, to the main storage. Further, when an indirect addressing mode is instructed, address data for the indirect addressing for the above portion of elements is read out from the main storage by each vector processing unit, and is temporarily held in a vector register in each vector processing unit, and the address data held in the vector register in each vector processing unit, is supplied to the address generators in all of the vector processing units.
Nakatani Shohji
Seki Ken
Sugiura Nobuyuki
Fujitsu Limited
Mcfadden Fincham
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