G - Physics – 06 – F
Patent
G - Physics
06
F
354/223
G06F 11/00 (2006.01) G06F 11/36 (2006.01)
Patent
CA 1297191
Abstract of the Disclosure A computer program is verified, unit by unit, by automatically instrumentating the code and generating a test driver program which executes all branches of an instrumented code unit. The code is instrumented by operating processors to standardize the code for at and to insert executable tracer statements into each block of reformatted code between control statements. A pseudocode having only control statements and tables identifying valid linkages between blocks of code are generated by another processor for use by a verifier in selecting values of input variables and expected outputs for test cases which execute each block of code in the selected unit. Another processor generates the test driver program from the test cases and a software test specification identifying the test cases and expected results. The test driver program and instrumented code unit are compiled and linked to repeatively execute the instrumented code unit to implement all the test cases. Results of the test cases are printed out indicating the sequence of block linkages generated by each test case, the expected output values and the actual output values.
562992
Casteel Eric P.
Delucia R. Ralph
Wolf Daniel J.
Bereskin & Parr
Casteel Eric P.
Delucia R. Ralph
Westinghouse Electric Corporation
Wolf Daniel J.
LandOfFree
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