Vertical deflection circuit

H - Electricity – 04 – N

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350/106

H04N 3/16 (2006.01) H03K 4/69 (2006.01) H04N 3/233 (2006.01)

Patent

CA 1279724

Abstract A vertical deflection amplifier of a video display apparatus includes first and second transistor amplifier output stages arranged in a totem-pole, push-pull configuration. A vertical deflection winding is coupled to the output stages at a deflection amplifier output terminal. An S-capacitor is coupled to the deflection winding at a second terminal remote from the output terminal. A source of deflection rate signals is coupled to the deflection amplifier for generating a deflection current in the deflection winding. A base current generating circuit is coupled to one of the transistor amplifier output stages for providing base current thereto. The S-capacitor voltage is applied to the base current generating circuit for enabling conduction of base current in the one amplifier output stage. When the video display apparatus is first turned on, the initially discharged S-capacitor is slowly charged from a DC voltage supply to delay generation of vertical deflection past completion of picture tube degaussing..

534229

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