Vertically isolated complementary transistors

H - Electricity – 01 – L

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356/23

H01L 21/20 (2006.01) H01L 21/225 (2006.01) H01L 21/762 (2006.01)

Patent

CA 1208805

ABSTRACT VERTICALLY ISOLATED COMPLEMENTARY TRANSISTORS A process for making complementary transistor devices in an epitaxial layer of a first conductivity type having a deep vertical isolation sidewall between the N and P channel transistors by providing a backfilled cavity in the epitaxial layer, the sidewalls of the cavity being coated with layers of material, the first layer being a silicate doped with the same conductivity type as the epitaxial layer in contact with the epitaxial layer and overcoated with an isolation and diffusion barrier layer, the second silicate layer doped to a conductivity opposite to that of the first layer and isolated therefrom by said isolation and diffusion barrier material. The cavity is backfilled with semiconductor material of a conductivity type opposite to that of the epitaxial layer and during this backfilling operation the dopants in the first and second layer outdiffuse into the epitaxial layer and into the backfill material respectfully to prevent the creations of parasitic channels.

481991

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