Virtually addressed cache

G - Physics – 06 – F

Patent

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354/237, 354/239

G06F 12/10 (2006.01)

Patent

CA 1212779

Abstract Disclosed is a data processing system including virtual-addressed and real-addressed stores. One store is addressed with real addresses and the other store is ad- dressed with virtual addresses. Whenever an addressed lo- cation is to be accessed in a store addressed by the other type of addresses, the address is translated to the other type of address. If a virtual address cannot access the desired location in the virtual store, the virtual address through a virtual-to-real translator is translated to a real address and the location is addressed in the real store. Whenever a real address needs to access a virtual address location in the virtual-addressed store, the real address is converted through a real-to-virtual translator in order to locate corresponding locations in the virtual- addressed memory.

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