Vital digital communication system

G - Physics – 06 – F

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G06F 11/08 (2006.01) G06F 11/16 (2006.01) G08C 25/00 (2006.01) H03M 13/51 (2006.01) H04L 1/00 (2006.01)

Patent

CA 1091353

VITAL DIGITAL COMMUNICATION SYSTEM Abstract of the Disclosure An all-digital communication system is arranged to exhibit fail-safe qualities. Each message includes a pair of words, each word separated from every other word by framing information in the form of two bits, either 1/0 or 0/1. Each word in the message is arranged to exhibit a constant ratio of l's to O's, so that more than a single change in any bit location is needed to change from one valid message word to another. The second word in each message is the complement of the first. Two decoders are disclosed, a hard-wired embodiment and an embodiment em- ploying a microprocessor. In the hard-wired embodiment, straightforward decoding is employed to determine the apparent message, and the apparent message is encoded to generate a locally generated message which is then compared, bit by bit, with the received message employing vital logic techniques. Assuming each of the received and locally generated bits compare, the message is validated. In the microprocessor embodiment, decoding of each word is accomplished by a table. Several checks are run to determine that the microprocessor is operating properly. The checks if successfully completed, produce a check word, which is not stored in the machine. The check word generated by decoding of the second word of a message, should be the complement of the first check word. Exter- nal hardware determines the existence of each check word, in sequence, and allows the decoded microprocessor output to be effective.

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