G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 15/31 (1990.01)
Patent
CA 2053674
A VLSI ARCHITECTURE FOR THE COMPUTATION OF RUNNING DISCRETE COSINE AND SINE TRANSFORMS N. Rama Murthy and M.N.S. Swamy, Fellow IEEE Centre for Signal Processing and CommUNications Department of Electrical and Computer Engineering Concordia University 1455 de Maisonneuve Blvd. W. Montreal, Quebec H3G lM8 ABSTRACT Despite the fact that several algorithms are available for the reduction of computation, the computation of some of the orthogonal transforms is still a computationally intensive taslc especially when one has to perform the computation in real-time. This problem is all the more significant in the transform (frequency) domain implementation of Least Mean Square (LMS) adaptive filters where a new set of transform coefficients of a block of sampleshave to be computed everytime the block gets updated with the arrival of a new sample(s). In this invention, we give an algorithm for computing updated running transform coefficients for Discrete Cosine Transform-II (DCT-II), Discrete Sine Transform-II (DST-II), Discrete Cosine Transform-IV (DCT-IV), and Discrete Sine Transform-IV (DST-IV) that is computationAlly attractive for real-time implementation. An architecture for the VLSI implementation of the proposed algorithms is also given.
Murthy N. Rama
Swamy M. N. Srikanta
Murthy N. Rama
Swamy M. N. Srikanta
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