Vmos/bipolar dual-triggered switch

G - Physics – 05 – F

Patent

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323/9

G05F 1/44 (2006.01) H03K 17/0422 (2006.01)

Patent

CA 1141823

ABSTRACT OF DISCLOSURE A relatively high-power switching device and circuit includes a first VMOS transistor which is turned on for supplying via its channel a first current to the base electrode of a bipolar transistor for turning on the latter into at least an unsaturated conduction state, thereafter a second VMOS transistor (having its channel connected between the collector and base electrodes of the bipolar transistor) is turned on for supplying a second current concurrently with the first current to the base electrode of the bipolar transistor, causing the latter to go into or as close to saturation as possible, depending upon the characteristics of the load, for mini- mizing the power dissipation thereof during a major period of its conductive state. Turn-off time for the bipolar transistor is minimized by turning off the first and second VMOS transistors in sequential order.

352298

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