Voice coding and decoding system

G - Physics – 10 – L

Patent

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Details

G10L 19/10 (2006.01) G10L 19/04 (2006.01) G10L 19/00 (2006.01) G10L 19/06 (2006.01)

Patent

CA 2242437

A first CELP coding circuit receiving a signal obtained by down-sampling of an input signal by a down-sampling circuit, outputs a part of coded output to a second CELP coding circuit. The second CELP coding circuit encodes the input signal on the basis of the coded output of the first CELP coding circuit. A multiplexer outputs the coded outputs of the first and second CELP coding circuits in a form of a bit stream/ A demultiplexer outputs the coded output of the first CELP coding circuit from the bit stream to a first CELP decoding circuit when a control signal is low bit rate, and extracts a part of the output of the first CELP coding circuit and the output of the second CELP coding circuit to output to a second CELP decoding circuit to output via a switch circuit when the control signal is high bit rate.

Un premier circuit de codage CELP recevant un signal obtenu du sous-échantillonnage d'un signal d'entrée par un circuit de sous-échantillonnage transmet une partie de sortie codée à un second circuit de codage CELP. Le second circuit de codage CELP encode le signal d'entrée en fonction de la sortie codée du premier circuit de codage CELP. Un multiplexeur transmet les sorties codées des premier et second circuits de codage CELP dans un train binaire. Un démultiplexeur transmet la sortie codée du premier circuit de codage CELP du train binaire à un premier circuit de décodage CELP quand il y a un signal de commande à faible débit binaire, et extrait une partie de la sortie du premier circuit de codage CELP et la sortie du second circuit de codage CELP pour les transmettre à un second circuit de décodage CELP par l'intermédiaire d'un circuit de commutation quand il y a un signal de commande à débit binaire élevé.

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