G - Physics – 05 – F
Patent
G - Physics
05
F
G05F 1/00 (2006.01) G05F 1/575 (2006.01)
Patent
CA 2289935
The invention concerns a voltage regulating circuit (1) capable of detecting "latch-up" disturbing the voltage to be regulated, eliminating said phenomenon and restoring the voltage at a predetermined level. Said circuit comprises a bipolar transistor (2), a resistor (5) and means supplying substantially constant voltage (6). Said circuit (1) also comprises voltage detecting means (11) arranged to receive the regulated voltage (Vreg), and supply a control voltage to said transistor (2) capable of controlling its being switched between a conductive state and a locked state, such that the transistor (2) is in locked state when a "latch-up" occurs causing the regulated voltage to fall below a first voltage level, and such that the transistor (2) is in conductive state, when said regulated voltage is lower than a second voltage level, below which the "latch-up" phenomenon is eliminated.
La présente invention concerne un circuit (1) de régulation de tension pouvant détecter un phénomène "latch-up" perturbant la tension à réguler, supprimer ce phénomène et rétablir la tension à un niveau prédéterminé, ce circuit comprenant un transistor bipolaire (2), une résistance (5) et des moyens de fourniture de tension sensiblement constante (6). Ce circuit (1) comprend également des moyens de détection de tension (11) agencés pour recevoir la tension régulée (Vreg), et fournir une tension de commande audit transistor (2) pouvant commander sa commutation entre un état conducteur et un état bloqué, de sorte que le transistor (2) est dans l'état bloqué quand un phénomène "latch-up" amène ladite tension régulée à chuter en-dessous d'un premier niveau de tension, et que le transistor (2) est dans l'état conducteur, quand ladite tension régulée est inférieure à un second niveau de tension, niveau en-dessous duquel le phénomène "latch-up" est supprimé.
Em Microelectronic-Marin S.a.
Gowling Lafleur Henderson Llp
LandOfFree
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