Voltage-stable sub-1m-mos transistor for vlsi circuits

Details Voltage-stable sub-1m-mos transistor for vlsi circuits Voltage-stable sub-1m-mos transistor for vlsi circuits

H - Electricity

01

L

356/128

H01L 27/04 (2006.01) H01L 29/10 (2006.01) H01L 29/78 (2006.01)

Patent

CA 1203321

A B S T R A C T A voltage-stable sub- µm-MOS transistor for VLSI circuits consist of a low-resistant silicon substrate of a first conductivity type with a high-resistant, thin, epitaxial layer of the first conductivity type situated thereon and on which a gate electrode consisting of polysilicon is disposed. Highly doped source/drain zones of the second conductivity type form a channel region of the first conductivity type. A doping substance concentration, rising in the direction of the substrate, is gener- ated by means of double implantation, whereby the concentration maximum extends to behind the source/drain zones. A method for manufacturing same incorporates steps of forming the several layers, applying a mask, executing a double implantation in the channel region, and forming the gate electrode.

423011

Affiliated with

Also associated with

Rating

Voltage-stable sub-1m-mos transistor for vlsi circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Voltage-stable sub-1m-mos transistor for vlsi circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Voltage-stable sub-1m-mos transistor for vlsi circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1200375