Wafer fabrication by implanting through protective layer

H - Electricity – 01 – L

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H01L 21/265 (2006.01) H01L 21/033 (2006.01) H01L 21/314 (2006.01) H01L 21/331 (2006.01) H01L 21/762 (2006.01) H01L 21/82 (2006.01) H01L 21/8222 (2006.01)

Patent

CA 1216075

WAFER FABRICATION BY IMPLANTING THROUGH PROTECTIVE LAYER Abstract of the Disclosure Manufacture of bipolar substantially isoplanar integrated circuit structures is accomplished by rearrangement of the conventional masking steps and by the substitution and full integration of implanting methods for diffusion methods. A uniform nitride layer is deposited over the basic structure of epitaxial islands separated by isolation oxide regions thereby passivating and protecting the isolation oxide regions, epitaxial oxide buffer layer and epitaxial layer from environmental contaminants. The nitride layer which forms part of a composite protective layer is maintained in place throughout a major portion of the fully integrated sequential implanting steps during which the collector sink, base and emitter regions are introduced into the epitaxial islands. At least a portion of the composite protective layer is a barrier to environmental contaminants throughout the process. The overall number of steps is reduced, etching steps minimized, and overall reliability of the structure improved. The process also includes field implanting of phosphorus in the isolation oxide for continuous gettering of ionic contaminants.

458075

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