Window borderline generating circuit for crt display

Details Window borderline generating circuit for crt display Window borderline generating circuit for crt display

G - Physics

09

G

375/46

G09G 1/00 (2006.01) G09G 1/14 (2006.01)

Patent

CA 1236601

WINDOW BORDERLINE GENERATING CIRCUIT FOR CRT DISPLAY ABSTRACT The disclosure teaches a circuit, for generating window borderlines for a CRT display, that is capable of generating such borderlines with a simple hardware configuration. A window region defining signal is generated which takes a first state for a period corresponding to a desired window region, and a second state for a period not corresponding to the window region during scanning period of the screen of CRT display. Then the signal is delayed and the delayed signal, and said window region defining signal, are exclusive-ORed to provide a timing signal for generating borderlines of the window.

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