Working set prefetch for level two caches

G - Physics – 06 – F

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354/241

G06F 12/08 (2006.01)

Patent

CA 1228171

WORKING SET PREFETCH FOR LEVEL TWO CACHES Abstract In a computing system including a three level memory hierarchy comprised of a first level cache (L1), a second level cache (L2) and a main memory (L3), a working set history table is included which keeps a record of which lines in an L2 block where utilized when resident in the L2 cache through the use of tags. When this L2 block is returned to main memory and is subsequently requested, only the lines which were utilized in the last residency are transferred to the L2 cache. That is, there is a tag for future use of a line based on its prior use during its last residency in the L2 cache.

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