Dual function error correcting system

G - Physics – 06 – F

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354/223.1

G06F 11/10 (2006.01) G06F 11/08 (2006.01) H03M 13/19 (2006.01)

Patent

CA 1159959

SA980033 DUAL FUNCTION ERROR CORRECTING SYSTEM Abstract A dual function cyclic code error correcting method and system are disclosed for correcting from a single syndrome byte a random single-bit error which occurs in a multi-byte data word or, alternatively, correcting a multi-bit error in one byte of the data word by pro- viding an indication of the location of the byte in error, and employing the same syndrome byte to deter- mine the error pattern of the multi-bit error so the multi-bit error can be corrected. The method involves non-zero syndrome processing steps which comprise a first series of steps which function to determine if the non-zero syndrome correlates to a 1-bit error in one of the byte positions of the data word being protected, and if so, to automatically correct the single-bit error by processing the entire byte containing the single-bit error. If no correla- tion of the syndrome byte is established with a single- bit error, then the byte position in the data word of the multi-bit error is used during a second series of steps to process the same non-zero syndrome byte to determine the pattern of the multi-bit error in the defective byte so that the pattern can be employed to correct the defective byte. The method and apparatus disclosed also identify the location of repetitive multi-byte errors by generating a byte parity vector for each data word and using these byte parity vectors to identify the location in each data word of repetitive errors of the multi-bit type.

385497

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