Data processing system with a fast interrupt

Details Data processing system with a fast interrupt Data processing system with a fast interrupt

G - Physics

06

F

354/230.85

G06F 13/00 (2006.01)

Patent

CA 1284386

ABSTRACT OF THE DISCLOSURE A multiprocessor system includes a number of subsystems all coupled in common to an asynchronous system bus. Apparatus is included in the system bus interface logic of each processing subsystem to receive commands from the system bus and compare the interrupt priority level of the new command with the current command being executed. If the new command has a lower interrupt priority than the current commmand, then the subsystem sending the command will receive a not acknowledge response from the processing system. The apparatus is responsive to certain control signals from the new command to bypass the interrupt priority comparison logic and initiate an immediate interrupt regardless of the interrupt priority level of the current commannd being executed by the processing subystem. The processing subsystem may also generate a command to itself via the system bus which requires the high speed interrupt.

548761

Affiliated with

Also associated with

Rating

Data processing system with a fast interrupt does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processing system with a fast interrupt, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing system with a fast interrupt will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1197450