Method for storing the control code of a processor allowing...

Details Method for storing the control code of a processor allowing... Method for storing the control code of a processor allowing...

G - Physics

06

F

354/224

G06F 12/06 (2006.01) G06F 9/26 (2006.01) G06F 9/445 (2006.01) G06F 11/00 (2006.01)

Patent

CA 1250665

Abstract A method and associated addressing circuit for storing the control code of a processor in a read only memory (ROM) and in a read/write memory RAM comprising a code area and a patch area. It consists in virtually dividing the control code in blocks of n instructions, storing the first instruction of each block into the code area of the read/write memory, and storing the n-1 following instructions of each block in the read only memory ROM. When an error is detected in at least one block, the first instruction of said block normally stored in the read/write RAM, is replaced by a branch instruction containing a branch address value so as to point to the patch area where the corrected block is stored.

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