Method and apparatus for testing digital systems

Details Method and apparatus for testing digital systems Method and apparatus for testing digital systems

G - Physics

01

R

324/58.1

G01R 31/28 (2006.01) G01R 31/318 (1990.01)

Patent

CA 1287886

Abstract of the Disclosure METHOD & APPARATUS FOR TESTING DIGITAL SYSTEMS In methods and apparatus for testing a digital system, system terminals used for coupling input signals into the system and output signals out of the system during normal operation of the system are connected in parallel to a single boundary register. The boundary register is operable to pass input signals and output signals transparently through the boundary register while accumulating together the input signals and the output signals. For testing purposes, the digital system and boundary register are run through a predetermined number of clock cycles while passing known input signals through the boundary register into the system. The known input signals and output signals provided by the digital system are concurrently accumulated within the boundary register to generate a test result pattern. In an alternative method and apparatus the boundary register is operable to generate input signals and to pass said input signals from the boundary register to selected system terminals while receiving output signals from selected system terminals and accumulating together the input signals and the output signals. The methods and apparatus are particularly useful for testing digital integrated circuits and systems comprising digital integrated circuits in their normal operating configuration and at their normal operating clock rates.

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