Timing generator

Details Timing generator Timing generator

H - Electricity

04

L

363/17

H04L 7/00 (2006.01) G06F 1/04 (2006.01) H04L 5/22 (2006.01) H04L 25/40 (2006.01)

Patent

CA 1310769

ABSTRACT OF THE PRESENT INVENTION The circuitry of the present invention taps a DS0 data stream and outputs a timing signal to drive terminal multiplexers. Even if the data bit stream is lost, the present invention continues to provide proper clocking signals. A composite clock (bit and byte clock) is provided by the present invention with the bit clock at 64 KHz and the byte clock at 8 KHz in the preferred embodiment. To avoid the problem of phase shift over long distances (limiting cable length) the present invention phase adjusts the digital bit stream clocking signal with a 360 degree delay, giving the appearance of advancing the signal in phase. An additional delay of one frame width is applied to the signal. A negative phase delay equivalent to cable runs from 0 - 1500 feet in 500 foot increments is also applied. In the preferred embodiment, a shift register is tapped in reverse order to accomplish this phase delay.

592769

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