H - Electricity – 04 – B
Patent
H - Electricity
04
B
354/71
H04B 14/04 (2006.01) H04B 1/66 (2006.01) H04J 3/16 (2006.01)
Patent
CA 1253255
Abstract of the Disclosure An encoder comprises first and second quantizers respectively inputted with first and second digital signals for quantizing the same while updating step size in accordance with first and second adapive bit information signals, respectively, an adaptive bit assigning circuit which adaptively assigns bits based on information signals regarding the step sizes of the first and second quantizers for outputting the first and second bit assigning information signals, and a multiplexer which rearranges the outut signals of the first and second quantizers in accordance with the adaptive bit information. A decoder combined with the encoder comprises a demultiplexer for rearranging a received signal into two received codes, first and second inverse quantizers respectively inputted with each of the receiver codes for decoding the same while sequentially and adaptively updating the step sizes in accordance with first and second bit assigning information signals, and an adaptive bit assigning circuit for generating the first and second bit assigning information signals in accordance with information signals regarding the step sizes of the first and second inverse quantizers. With this system the effect of quantization distortion can be minimized and it is not necessary to transmit a bit assigning information signal.
454314
Corporation Nec
Smart & Biggar
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