Receiver comprising parallel signal paths

H - Electricity – 04 – B

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325/111

H04B 1/16 (2006.01) H03D 3/00 (2006.01) H03D 7/16 (2006.01) H04B 1/30 (2006.01) H03D 1/22 (2006.01)

Patent

CA 1299249

PHN.12235 15-9-1987 ABSTRACT: Receiver comprising parallel signal paths. The receiver 1 in Figure 1 comprises a pair of signal paths 3-1 and 3-2 connected in parallel to an input 2, each composed of the respective mixing stages 4-1, 4-2, low-pass filters 5-1, 5-2 and mixing stages 6-1, 6-2. The mixing stages 4-1, 4-2 are connected to the oscillator 8 in a phase-quadrature relationship. The mixing stages 6-1, 6-2 are connected to the oscillator 9 in a phase- quadrature relationship and are both connected to a super- position circuit 7 having an output 10. For obviating the drawback of unbalance in the signal processing in the signal paths 3-1, 3-2, the receiver 1 includes a control signal arrangement 11, which is constituted by the respective further mixing stages 14, 25, low-pass filters 47, 48, and mixing stages 17, 29 for producing at the control signal outputs 22, 34 an amplitude and a phase control signal for correcting this unbalance. The linking of the oscillator 9 to the mixing stages 14, 25 and through a divider 36 to the mixing stages 6-1, 6 2 makes the use of an additional narrow band phase-locked loop redundant so that the receiver 1 has a short acquisition time, hence is very suitable for use in mobile systems and can easily be inregrated on a chip.

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